Data transmission speed and quality is an important aspect of data communication systems and networks. Data may be transmitted according to different data transmission protocols. Multilevel signal modulation, such as 4 level pulse-amplitude modulation (PAM4), is used for enhancing the data rate in bandwidth limited data communication channels. Integrated circuits enabling data transmission are an important part of the data communication systems and networks. As operating and design characteristics, such as transistor sizes and operating voltages, of integrated circuits continue to change, the performance of a transmitter circuit can be affected.
In gigabit transceiver (GT) with a data rate above 20 gigabits per second (Gb/s), the last multiplexing cell in a transmitter serializer is commonly coupled to a pre-driver stage which drives an output driver stage, such as current mode logic (CML) driver stage. The pre-driver stage should provide approximately 1V of output swing, suppress clock switch ripples to the level less than 50 mV, and have a rise/fall time of approximately 10 ps-15 ps. However, it is difficult to meet all of these requirements together in a CML stage alone because of lack of gain as well as bandwidth limitations.
Accordingly, circuits and methods of providing an improved transmitter circuit of an integrated circuit are desired.